Standardization of dimensions for crystalline silicon wafer batteries

A small increase in the size of silicon wafers can lead to a small increase in the output of battery and component production lines, thereby reducing production costs per watt. At the same time, it can improve component power and conversion efficiency without changing the size of the component version. In addition, as components enter the 4.0 and 5.0 eras, a concise approach is to increase the size of batteries and components. Many companies fine-tune the size of silicon wafer batteries to achieve a competitive advantage in their products, resulting in multiple choices of silicon wafer size and causing difficulties for upstream and downstream cooperation in the industry chain. Increased product inventory. Therefore, there is an urgent need to develop silicon wafer size standards. Through discussions and voting among major silicon wafer and battery component companies in the industry in the past two years, three silicon wafer sizes have been selected as the recommended standard sizes for the industry, namely 156.75mm, 158.75mm, and 166.00mm.

1. The Origin, Development, and Necessity of Standardization of Silicon Chip Dimensions

Due to the fact that photovoltaic silicon wafer materials originated from semiconductor single crystals, the photovoltaic industry has always used semiconductor wafer sizes of 6 inches and 8 inches (diameter), corresponding to the so-called 5-inch (125mm) and 6-inch (156mm) silicon wafer edge dimensions. Due to the progress of battery production equipment and the demand for increased output, 5-inch wafers have gradually withdrawn from the photovoltaic industry chain. After 2012, except for 1-2 special battery manufacturers, 125mm silicon wafers have been basically eliminated from the market.

The industry's previous attempt to slightly increase the size of silicon wafers was in 2015. Single crystal silicon wafer manufacturers increased the side length of 156.00mm to 156.75mm and reduced the chamfer of single crystal silicon wafers, introducing M2 sized silicon wafers. The size standard revision was approved by the SEMI Standards Committee in 2017. In this way, the edge length of a single polycrystalline silicon chip has actually started to be unified to the size of 156.75mm. In the revised version of the 2018 national standard for polycrystalline silicon wafers, 156.75mm was also determined as the standard side length, and it is recommended to increase the size in multiples of 1mm in the future.

However, this unified size did not last for too long, and some companies in the industry have begun to fine tune their battery size again, pursuing the highest conversion efficiency and power output of components under the existing size, in order to meet the requirements of China's "Guiding Target Project". The silicon wafer size has appeared in 157.0, 157.3, 157.5, 157.75, 158.0, and so on based on the 156.75 standard. Driven by the goal of module power exceeding 400 watts and minimal investment in transformation, and the greater use of existing battery and module production lines to reduce production costs, silicon wafer sizes have undergone changes such as 158.75mm, 161.75mm, 166mm, etc.

The increase in the size of silicon wafers and batteries is beneficial for the industry chain, from silicon wafers to batteries, and especially for the reduction of processing costs per watt of components, which is an important direction for industry technological progress. The increase in power of single chip components, even through the increase in component size, is an effective way to reduce the cost of kilowatt hours as long as it is acceptable for market installation. Therefore, the increase in silicon wafer size is a trend in the development of photovoltaic manufacturing. Standardizing the size of future silicon wafers and forming standards commonly adopted by the entire industry has become a common demand of photovoltaic manufacturing enterprises.

At present, the diversification of silicon wafer sizes in the industry has caused great trouble for the industry chain, from silicon wafers to batteries to components. Silicon wafers produced for a specific battery size cannot be circulated to other customers, which can easily cause inventory and waste. Similarly, some sizes of batteries are difficult to find other buyers, resulting in backlog, and so on. Due to the uncertainty of future silicon wafer size, device providers are unable to fully develop new generation batteries, component devices, and so on. Therefore, the size of silicon wafers urgently needs to be unified and standardized.

Since 2017, under the organizational structure of IEC TC82/WG8, Poly GCL has organized major silicon wafers, battery modules, equipment manufacturing, and testing units in the industry to discuss and develop standard geometric size standards for crystal silicon wafers used in photovoltaic cell production. We recommend several silicon wafer sizes that are widely used in current large-scale production and provide expected guidance for future silicon wafer sizes. The crystal silicon wafers here include single crystal silicon wafers drawn by CZ method, polycrystalline silicon wafers grown by ingot method, and single crystal silicon wafers grown by ingot method.

2. Principles for determining the size of silicon wafers

Firstly, we need to recognize that there is no right or wrong issue with different silicon wafer sizes, and there is no technically superior issue. The recommended size for adoption in the standard is something that most companies are willing to accept. To avoid too much controversy, we confirm the following basic principles:

1) The size specifications of silicon wafers should be minimized as much as possible. Try to confirm an acceptable size for silicon wafers through modifications to existing battery and component production equipment, as a recommended and promoted standard size.

2) Special precautions should be taken to prevent small variations in different sizes above the standard size, such as an increase of less than 1.0 mm. Many of the minor changes that have occurred above 156.75mm are based on the larger utilization of component sizes and equipment miniaturization in the enterprise itself, and should be avoided as much as possible.

3) Suggest specifications for the size of silicon wafers that can be adopted by new or significantly modified battery module production testing equipment, and ensure that the recommended sizes increase as much as possible and are accepted by the component application end.

4) Confirm a small increase in the size of future larger silicon wafers to guide the determination of new sizes for future technological development.

5) For quasi square silicon wafers, there is no mandatory requirement for the diameter of the crystal rod, but recommended values are provided.